Showing posts with label intel. Show all posts
Showing posts with label intel. Show all posts
Friday, April 10, 2015

Intel DDIO, LLC cache, buffer alignment, prefetching, shared locks and packet rates.

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I've been digging into the low level behaviour of high throughput packet classification and pushing for my job. The initial suggestions ...
4 comments:
Thursday, March 19, 2015

Cache Line Aliasing #2, or "What happens when you page align everything"

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After a little more digging into the Intel performance side of things, I discovered one of the big reasons for the performance drop on this ...
1 comment:
Friday, March 6, 2015

cache line aliasing effects, or "why is freebsd slower than linux?"

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There was some threads on FreeBSD/DragonflyBSD mailing lists a few years ago (2012?) which talked about some math benchmarks being much slow...
4 comments:
Tuesday, October 28, 2014

More RSS UDP tests - this time on a Dell R720

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I've recently had the chance to run my RSS UDP test suite up on a pair of Dell R720s. They came with on-board 10G Intel NICs (ixgbe(4) i...
Friday, September 19, 2014

UDP RSS update: ixbge(4) turned out to have issues..

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I started digging deeper into the RSS performance on my home test platform. Four cores and one (desktop) socket isn't all that much, but...
1 comment:
Wednesday, September 10, 2014

Receive side scaling: testing UDP throughput

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I think it's about time I shared some more details about the RSS stuff going into FreeBSD and how I'm testing it. For now I'm ...
1 comment:
Friday, August 1, 2014

Receive Side Scaling: figuring out how to handle IP fragments

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The TL:DR; of this is - IP fragments are annoying. If everything was awesome and there were never IP fragments, all TCP and UDP frames wou...
Monday, July 21, 2014

Application awareness of receive side scaling (RSS) on FreeBSD

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Part of testing this receive side scaling work is designing a set of APIs that allow for some kind of affinity awareness. It's not easy ...