Sunday, December 11, 2022

Who's the /BOSS on the Amiga 2000 ?

 I slipped and bought a TF536 to put into my Amiga 2000. TL;DR is it's now running, but it took a bit of fiddling to get there. When I was last getting it going I noticed it didn't like any Zorro-II RAM in there, so I simply disabled it (it wouldn't do much) and left it alone. The storage card I'm using (a GVP SCSI job) doesn't do DMA to Zorro-II RAM - it does DMA to/from a 64k IO/RAM window which then the driver memcpy()'s out.

Whacking it in with the CPU riser I got from booted up fine as long as no other RAM cards were installed.

If I installed my storage card or any zorro-II RAM cards it just hung. Not fun.

So then I thought, wait a sec. It's going into the CPU expansion slot, not the CPU socket. And there's this thing called /BOSS which accelerator cards in the CPU expansion slot should assert if they want the DMA and some other signals routed to them rather than the main CPU socket.

So, I grabbed a different one.

This one has a jumper for /BOSS to keep it enabled, and also has the FC0..FC2 pins (indicating the CPU state) also routed.

I plugged this in and bam.

(note I didn't leave the 2MB RAM enabled on the storage card after this test; until I'm ready to screw around with programming stuff that explicitly wants to test Zorro-II/Zorro-III space RAM, I'll leave it off.)

I also tested it with an 8MB Zorro-II RAM expansion (the ZoRAM card that's available on the internet) and it also works fine.

Anyway TL;DR is - don't forget to ensure your accelerator card installation on an Amiga 2000 has /BOSS asserted, or a bunch of DMA/Zorro-II lines won't get routed to the CPU expansion slot and things won't work right.

Tuesday, December 6, 2022

damnit i slipped and (mostly) built an amiga 500

EDIT - the original article has an image of the PCB with the floppy power connector mounted the WRONG WAY. 

This is the INCORRECT WAY. Do NOT do it this way!

TL;DR - I'm half way through building an Amiga 500+ replica. The goal:

  • New PCB
  • New clear case
  • Actual floppy drive!
  • TF534 Accelerator, yes I am interested in FPU stuff for reasons and yes I'm sad about the 4MB of RAM but I'll make do - terriblefire does a great job designing/building/debugging these accelerators and I'm glad they exist!
  • ECS Denise, also for reasons
  • 2MB chip RAM and some slow RAM too because again why not
  • 3.x ROMs
The challenges!

  • I need a keyboard for it, but my "donor" machines, like my "donor radios", all now work. Hilarious.
  • The Amiga 500+ board wasn't well documented for assembly, until I looked. Closer.
  • Well, the 8375 Agnus I acquired is a PAL one, so I guess I'm building a PAL Amiga 500+. (Which is fine as you can switch it in software after boot, but STILL.)
  • Oh yeah, floppy drives. Ugh.
Ok, so the PCB. I picked it up from . There's a link with the component list, and I got them all with some hunting around. I wish I had a "dead-ish" donor Amiga 500 of suitable vintage to grab parts from, but again, all my machines now work. Ha.

Here's it assembled. Well, mostly.

I still have some connectors and the RTC to add. Yes, it's a 2.x workbench ROM. Yes, it boots to ROM fine.

Now, what do I do about the jumpers? The instructions don't have the Amiga 500+ rev8 PCB jumper descriptions. Ok, they're in the service manuals. And yeah I can read the schematic, but I wanted to be lazy.

Ok, so I started to look at it. I definitely wanted the 1MB/2MB option. I wanted the expansion RAM to show up in chip RAM to start with. Ok, ok. But, guess what. The PCB has them already kinda done.

Here, look closely.

JP3 is already done for us. (For 1MB/2MB I need to have them horizontally jumpered, not vertically.)

And for JP2:

It turns out the two bottom pins are already joined. I'd have to cut the track to start using the expansion RAM slot as slow RAM (in $C00000) or if/when I fit a Gary Adapter / RAM expansion add-on.

Finally, the case is here and the TF534 is installed and boots up to ROM fine.

I'll finish the installation once the sockets arrive - and yes I may go and borrow my rev5 amiga 500 keyboard and Gotek floppy drive emulator until I get suitable replacements. Or, maybe just design an Amiga 500 keyboard drop-in replacement with cheap cherry MX style switches. Why not.

Sunday, September 25, 2022

Installing a kickstart ROM adapter in my Amiga 1000, or "Nothing works, and nothing makes sense"

The Amiga 1000 is a slick looking machine. It however loads its ROM from floppy disk. The Wikipedia Article on the Amiga 1000 explains why.

I wanted to put a Kickstart 1.3 ROM in my Amiga 1000. There are adapters out there you can build and install. I chose one, followed the instructions, and it didn't work.

After a whole lot of digging I finally got it working and now I'm documenting what hilarity I found.

I started with this one from the amiga community. The PCB manufacturing files are available on PCBWAY as a shared project. So, I got the board made, did the board mods on my Amiga 1000, and set it up. No bueno.

Let's go over the mods first before I explain why it didn't work.

First up, the Amiga 1000 has a pair of small ROMs (lower and upper 8 bits of the data bus) to bootstrap the ROM image from floppy disk, throw it into the write once memory store and then kick it appropriately to take over the ROM memory address range. The ROM address range is $F80000 -> $FFFFFF - a 512KiB region. But, this ROM isn't that big at all.

The schematic calls out what's going on pretty clearly. This is for the early revision Amiga 1000, with the U5N / U5P ROMs populated.

The /OE lines (pin 22) go to /ROM01 on the PALs, which (among other things) enables the ROMs only when the write-once memory store isn't active and we're in the ROM region.

But look at the other bits going on.

First, pin 1 is going to +5 volts, instead of A16. Pin 27 is going to A15 instead of .. the processor R/W pin? Weird. Anyway, let's look at these ROMs.

First confusing thing here - the ROMs addressing starts from A0 to A14. The 68000 bus however doesn't have an A0 - it's A1 to A23, and then there's upper/lower byte select lines. So, this ROM A0 is the CPU bus A1, the ROM A1 is CPU bus A2, etc.

Pin 1 is NC - it'd be ROM A15 on a 64k x 8 ROM. Ie, Amiga/68000 A16. And pin 27 is ROM 14, Amiga/68000 A15. That makes sense.

What's happening with the OTHER /CS line though?

On U5N/U2N, the /CS2 lines in the schematic to go W2 and W5. The intention looks to be whether A16 or A17 acts as a chip select line to enable either the lower or upper set of ROMs. If you wanted 32KiB ROMs then you'd want A16 to be the /CS2 control. If you wanted 64KiB ROMs then you'd want A17 to be the /CS2 control.

In theory, if everything is wired up fine, this means you can fit 256KiB of ROMs by fitting four 64KiB ROMs and jumpering things appropriately. You'd want:

  • W2 to be CPU A16
  • W1 to be CPU A15
  • W3 to be CPU A14
  • W4 to be CPU A17
  • W5 to go via the 74LS04 to invert A17 as the /CS2 line, so either the U5N/U5P is enabled, or the U2N/U2P is enabled.
However, this just plainly didn't match what's on my board. After trying a couple times to do the whole mod, I started to question whether the PCB matched the schematic. Hint, it ... didn't.

Here's what the PCB layout looks like, front:

and back:

You can see where you need to cut W1, W2, W3, W4 (and W5, but I didn't) to turn it into a selectable jumper set.

So, I buzzed out both the ROM board and the Amiga 1000 board to see what was going on. And what I found was ... pretty amusing. I removed all four jumpers and:

  • 68000 D0..D15 are OK
  • 68000 A1..A15 are OK
  • 68000 A16, A17 - not OK!
  • 68000 A18 - OK!
The A18 line made it to the ROM board via one of the wires soldered to the write-once RAM board. The ROM /CS line was soldered to the write-once RAM board as well.

Then I went digging on the ROM board. Let's use ROM numbering now, starting at A0 (cause that's how my notes went.) A0 to A8, A9, A10, A11, A13 used the "even" ROM address lines. A15 used pin 1 on the odd side. A16 on the kickstart ROM mapped to /CS2 on the odd side. A17 on the kickstart ROM mapped to the 4 pin connector and over to the write-once memory board. Same with the ROM /CS line.

So, I had some culprits.
  • /CS2 maps to ROM A16 which is Amiga/68000 A17. Ok, so maybe I can play with that on the Amiga side using W4, right?
  • Where the heck was Amiga/68000 A16 being routed?
  • ROM A15 on odd pin 1 should be controlled by W2, either being Amiga/68000 A16, or +5v, right?
Ok, so then I started buzzing the jumpers and finding out where they went. I then made my first discovery - the trace to ROM /CS2 ? It was tied to CPU A16. No matter what. So, I couldn't flip W4 to the alternate configuration - that shorted ROM /CS2 and CPU A16 to CPU A17. Which means I could not use the /CS2 pin on the ROM adapter, I had to run a separate wire to connect it to CPU A17 and have it end up on the right ROM pin!

Ok, so. I did that. I routed ROM A16 to the middle pin of W4 and ROM A17 to the right hand pin of W4. The rest of the jumpers mirrored the original configuration of the Amiga 1000.

.. but then, nothing. Ok. I went looking at what else could be missing. Then I found the fun reason - the kickstart adapter PCB didn't at all hook up the /BYTE control line to anything. It was just floating. This is problematic for things like DiagROM or the flash based ROM replacements which expect /BYTE to be set correctly for word access. So, I soldered a wire to +5v so it would be tied high and enable word mode.

Success! The ROM booted to a green screen! Ew.

So, in went the Amiga DiagROM. And DiagROM booted! And gave me a lovely screen of horizontal bars! Now, they're supposed to hint at which data line could be busted, but they were all light green and I was told by the author that it may also be not finding enough chip RAM. He suggested a 5V UART directly attached to the UART TX pin on Paula, and that's what I did.

And he was right - it was only detecting 64k of chip RAM.

I was very confused. I slept on it. The next day I fired up the DiagROM again but with some fast RAM attached, so DiagROM would actually start all the way. Then I used the memory editor to edit regions of chip RAM to see how it behaved. The RAM behaved .. fine? Until I looked a bit closer.

The first 64KiB of chip RAM was mirrored in the second.

The third 64KiB of chip RAM was mirrored in the fourth.


That told me A16 was stuck. But, it couldn't be the whole of A16, or the ROM code wouldn't get very far. No, it was something to do with RAM. Or, to be clear, the address decoding of chip RAM. I had a late night idea that day- what if the bit wasn't stuck, but it .. wasn't being routed?

So I buzzed the chip RAM address bus, here:

These go up to the write-once memory board, so I buzzed A16 on pin 10 of that chip and ... bam. Nothing. No connection to CPU A16.

Then I buzzed the jumpers. And I found the last thing that super surprised me.

The left hand side of W4, that was connected to the CPU A16 and /CS2 line? That pin goes to the RAM A16 line.

And so does the W2 jumper. The left hand side of W2 is RAM A16. The middle is ROM A16. The right is +5v.

So, the PCB routing seems hella wrong there.

So, after removing two pins from my adapter, routing /CS and A17 directly out as wires for A16 and A17, and hooking them up as shown, DiagROM started and all chip RAM was found. When I flipped out the Diag ROM for a Kickstart 1.3 ROM, it also worked fine.

As you can see, the jumper positions are basically where they were for an unmodified board, except that I'm manually grabbing the Amiga/68000 A16/A17 lines and running them to the ROM adapter (and those pins are removed from both odd/even connectors!)

Well, that was fun. "Fun". I have a second Amiga 1000 here, I may choose a different path for its upgrades.

Monday, July 11, 2022

Fixing a third commodore plus/4, or "god damnit adrian stop it"

Here's a fun and easy one to fix.

One commodore plus/4. Here's what it displayed.

Looks like the TED chip is outputting something, but it isn't setup right.

So I pop it open. There's the right clock on pin 1 of the CPU - switching between 1 and 2MHz as it does. Ok, so let's check the ICs.

Hm, there's something wrong with the CPU pins.

And this socket ... is kinda busted looking. One whole side of pins just aren't making contact correctly.

Anyway. I removed the socket, replaced it with a new one and ... well, that was it!

The end!

Monday, May 23, 2022

Getting new simgen backdrops on my amiga 500

This'll be nice and short.

I wanted to add some new backgrounds to simgen, which is a hack on Amiga Workbench 1.3 setups which allows for a 1 or 2 bpp (2 or 4 colour) background image.

Part of it is figuring out how to convert to a suitably formatted IFF (interchange file format) for an Amiga. I didn't want to install photoshop or do photo conversion on the Amiga. Yeah I'm lazy.

So the TL;DR is:

  • - rgb2amiga converts images to IFF using Imagemagick 6. Yes, make sure you install ImageMagick 6 as the latest version API has changed enough for this to fail compilation.
  • Make sure you resize the original image to a suitable resolution for your desktop - I'm using 640x200, and I'll play with 640x256 later.
  • Make sure you also realise the output screen is 4:3, so crop appropriately.
  • Run the program, and see what happens.
Here's the input and output images:

Yes I know I didn't crop it to the right aspect ratio; I just wanted to see if it worked before I spun cycles on optimising things.

Thursday, May 19, 2022

It took me WAY too long to get this gotek to work...

 The short version - when you buy an actual OG Gotek with the OG Gotek firmware, it doesn't work in any convenient way that is documented on any of the retro computing sites, because you DEFINITELY need to flash it with different firmware.

Ok, so the less short version!

I picked up a busted Amiga 500 for free to help repair an Amstrad CPC464 for someone. It had a busted ROM socket, busted RAM and some other random crap that I needed to fix. Oh and 50 of the keys were not working, and the key membrane was broken!

So everything above is fixed - and I still need to fix the RTC in the A501 memory expansion - but now I need to get it to boot. And I don't have a spare floppy drive for this.

But I did have a Gotek - I bought it for the IBM PC stuff, but I ended up bootstrapping it using USB 3.5 inch floppy drives.

.. and it didn't work. And I didn't understand why.

So, the summary.

I wanted to flash the FlashFloppy Gotek stuff from Easy peasy. Get a UART hooked up and connect to FreeBSD.

Didn't work. Welp.

After reading around I found that someone tried at 9600, because it just wouldn't work faster.

I did that and well now it does. It's quite possible if I added the 10k pull-ups mentioned on the flashfloppy hardware mods section that I'd have more luck.

.. and flashing it from FreeBSD:


Ok, next. Hooking it up. Set it to be device 0, remove another config jumper. Easy. Also, apparently the pinout is .. reversed on the amiga 500? In any case, pay super close attention to the orientation of the floppy drive connectors.

Anyway. Now it works. I then followed the installation instructions for a USB stick and whacked Workbench 1.3 images on - and now it boots fine into workbench 1.3. I've ordered a replacement mounting frame for the Gotek board so it can sit in with the case closed - but for now the machine works.

Well, besides the RTC. That's next. Ugh.

Saturday, May 14, 2022

Amiga 1200 - Kickstart 3.1.4 upgrade, but not upgrading to AmigaOS 3.1

 So I splurged a couple bucks on the updated AmigaOS 3.1.4 from Hyperion. It came with both the ROMs and AmigaOS. Now, I have 3.1 installed already, and I wanted to just drop in the ROMs.

It almost worked.

It looks like they moved some libraries from the ROM out to disk/RAM in order to make space.

So I figured they were on one of the installation disks, and....

Easy peasy. I copied icons.library and workbench.library to my system partition and rebooted. All good!

It's really quite slick how Kickstart ROMs are basically a bootloader and then a whole bunch of libraries, some of which form the core OS and some are actually just libraries. I'm sad this concept didn't show up elsewhere.

Monday, February 7, 2022

At least cross compiling for the Amiga 500 is easier than the 16 bit DOS mode PC stuff

I wanted to hack on Amigaterm ( a bit, but I found out that someone already had done that ( They fixed some bugs and added speeds above 9600 baud - 19200 works fine on the Amiga 500, and 38400 works fine on the Amiga 1200.

But I wanted to add a couple more things - play with what Amiga calls "serial hardware flow control" (which is .. not quite what you expect...) and fix up xmodem receive to allow it to truncate data at a particular file size. Without the truncation option the written file is a multiple of the xmodem block size (128 bytes) which results in binaries you can't actually run.


There's a very nicely put together build framework targeting m68k Amiga at . I haven't built it yet on FreeBSD - just Ubuntu Linux and MacOS/X. Then I wanted to get amigaterm to compile for workbench 1.3 as that's what is on my Amiga 500. It turns out that's quite easy - you just need to use the right command line option (-mcrt=nix13), but you need to be sure that you're not trying to use library versions and functions that are later than what 1.3 supports.

This did trip me up - there's a ChangeFileSize() in later OS versions (4.0 I think?) that isn't in 1.3, but there is SetFileSize() in 1.3 (library version 36). I ended up opting for just not writing out the data instead of writing it out and truncating.

Now that this is working I think I'll go and see if using 128 byte receive data buffers when receiving xmodem packets works better than byte at a time. I need to go and understand how they handled timeouts so I don't end up waiting forever for data to show up. That may end up speeding up receive transfers a little.

What I'd really like to do is bring over or write very small zmodem receive library to really speed things up to make it less painful to transfer the 880 kilobyte disk images (ADF). That'll make bootstrapping things less painful in the future.

Next up is fixobj. The source for that is on the fish-010 disk so I modified it to compile here. It's hard-coded to search the last 128 bytes for the end of an executable binary, which matches the normal 128 byte xmodem block size.

Finally, I've put them both in github here - .

Saturday, February 5, 2022

Getting stuff onto the Amiga 500, or "holy crap please include bootstrapping serial file transfer utilities in your OS"

Yes, I know I'm ranting about 1980s OSes, but to be quite frank, modern OSes on a variety of hardware still have a similar problem.

Wait, what do I mean you ask? Surely you will always have ethernet/wifi/USB available? I almost started writing a bit on that here given I end up working behind the scenes on modern hardware and a LOT has to be working before you can talk over the network or, heck, even boot your device. But I'll leave that for another day.

This is a similar thing to what I found in a previous blog post about boot-strapping an old PC/AT before I had useful media (read: disks and other working machines.) It's doubly tricky for the Amiga because of it's non-standard floppy disk format that can't be easily read on PCs, let alone written to. You need to have another Amiga, or some modern multi-format disk interface like the Catweasel. I lucked out and at least got working Workbench 1.3 Main and Extra disks with the Amiga 1000 I picked up - but no working Kickstart disk, hence why I'm working with the Amiga 500 right now.

Anyway, the goal of this is to get the following to work:

  • Figure out how to transfer a simple program to get a single binary over in a useful way;
  • Transfer a small enough program over to do xmodem/ymodem/zmodem;
  • Use that to bootstrap the tools to write disk image files to an Amiga 880K disk; and
  • Also write out a working Kickstart 1.3 disk for my Amiga 1000.
This is... surprisingly annoying to do.

Firstly, how to get the initial files over. Workbench didn't come with a file transfer program, even with AmigaDOS. xmodem was around in the late 70s so it could've been used. Oh well. Luckily the Extras disk includes AmigaBASIC which can speak to both the disk and the serial port. And there are guides out there for how to write a simple non-error-checking binary receive program - I used this one.

I also needed to make a null modem cable up. Now, the Amiga 500/1000 used some of the RS-232 port pins for things other than ground, so it's best you make one of your own. Here's what I used for my Amiga 500.

The Amiga 1000 uses a reversed serial port, and I will figure out that particular hilarity once I get it booting with Kickstart.

However! Not everything was, err, well documented. I remember Amiga stuff in the 90s, but not THAT well.

First up - the receive.bas program in the above link doesn't at all set the serial parameters. So before you start it you need to run the Serial preferences program and configure it up. It also assumes that you're using 1024 byte buffers, so you need to do the following:
  • Set the speed - I used 9600, it's somewhat reliable here;
  • 8/N/1, which is already setup;
  • Buffer size 1024 bytes, not 512 bytes;
  • Hardware flow control!
Then yes, on the linux side I did the same (stty 9600 -parenb cs8 crtscts -ixon -ixoff raw iutf8 -F /dev/ttyUSB0).

Ok, then running the program. It's best you get the data going into the ram disk, so set your file target as RAM:filename. Easy.

Except the block size thing. Apparently with the way AmigaBasic speaks to the serial driver the transfers have to be in block sized blocks, not just the file size. So you need to pad the file you're sending. The receive.bas program will write out the correct length for you.

I did something like this:

  • dd if=file bs=1024 conv=sync > /dev/ttyUSB0
That padded it correctly and .. well, after a few attempts I can get a ~ 20k binary to transfer OK.

Then comes the fun part, what to transfer. I started by transferring lharc. However, apparently the later versions don't work with Workbench 1.3! I had to use .

It took a few goes, but yes, I got a working lharc tool on the floppy disk.

Next up is transferring something less terrible to transfer files with. A lot of things are lha'ed, which is why I spent a lot of time trying to get lha to transfer. Next time I won't, I'll unpack them on the linux sending host and send the binaries.

I needed a small transfer program to work on Workbench 1.3. I found . It's small, it runs on Workbench 1.3 and it has xmodem support. Nice!

However! It's xmodem support doesn't ask for the receive file size, so it rounds it up to the nearest block size. No! Things like lha then don't seem to work right and binaries certainly don't run.

Ok, so how'd they do it in the 80s/90s? It turns out there's a little utility called "fixobj" which tries to find the actual end of a binary object inside a file and truncates it there. I unpacked and grabbed the small binary from it. Now I can transfer individual programs, like, to write out an ADF image to disk.

So, that's transferring right now upstairs via xmodem at 9600. Yeah it'll take a while. Luckily 901120  bytes (the size of an ADF image) is exactly 7040 blocks of 128 bytes each, which is what xmodem is using. Thus I should be OK without having to truncate stuff.

Once that's done I can start transferring things to get the IDE disk add-on I have here booting, and I can setup the rest of this Amiga 500 to do fun things.

What I think would've made this easier?
  • Some tiny xmodem program that can be transferred over serial relatively quickly, and can receive exact file sizes (ie it'll truncate the last block if needs be)
  • A program to actually truncate a file at a given offset so you can use amigaterm as-is to transfer files slowly but reliably, and then just manually truncate it to where it needs to be in order to use it.
  • ... and then some less tiny but working zmodem program that'll work with Workbench 1.3 to get files on and off the thing.
In any case I'm hoping by tonight I'll have this thing writing out ADF disk images OK albeit slowly, and I'll see if I can get zmodem working on something faster like 19200 baud.

Tuesday, February 1, 2022

Hacking up an Amiga 500 for 1MB chip RAM and 512k slow RAM

 In a previous post I dumped a bunch of information I had learnt about what had happened in open source Amiga hackery. I've now gone and committed the initial hacks needed to prove that it works and document how I did it.

My goals here were:

  • Build one of the memory expansion Gary adapters that are out there - I chose the PeteAU design that I've checked in here;
  • Figure out how to modify a rev6 amiga 500 board so I can put 1MB of chip RAM in the provided sockets there (with the schematic available here);
  • Make it so a normal A501 512K RAM + RTC add-on can be plugged in to provide the 512k of slow RAM.
First up, it worked. Here's how dirty it is.

The overview is pretty conceptually easy.

  • The PeteAU Gary adapter (and I'm sure others!) use the RAS1 line into Agnus and its A19/A23 address line to map RAM into Agnus' other 512k addressable RAM space. The RAM expansions are thus muxed on breaking out CASL and CASU lines whilst enabling RAS1.
  • The little break out PCB there is the 74HCT139 dual 2-to-4 demux to decode the two address line bits from the Gary adapter + CASL/CASU lines from Agnus into four CASL/CASU lines.
  • The "first" bank from the PeteAU Gary adapter is mapped in as the second half of the 512k chip RAM - and as seen in the picture above, those bent legs are CASL/CASU lines.
  • The two tracks that run from U35 out to the trapdoor expansion connector are the CASL/CASU lines to said trapdoor expansion connector. I've cut those and wired them into the second CASL/CASU pair from the 74HCT139 demux.
  • No modifications are done on the A501 expansion board.
I've basically just migrated the 74CHT139 from the PeteAU Gary+RAM expansion adapter board back onto the Amiga 500 rev6 PCB.

Here's the relevant bits from the rev6 schematic:

The second bank of 512k chip RAM is U20,U21,U22,U23. It uses RAS1 and the same CASL/CASU that the first bank of 512k chip RAM and the expansion connector.

On the rev6 PCB the CASL/CASU tracks route from U35 to both the RAM and the expansion connector. Cutting the tracks going to the expansion connector is fine; they run there and stop.

Now, finding useful documentation for what to do.

First up, figuring out how to configure the Amiga 500 rev6 PCB.

  • J2 (the Agnus A19/A23) jumper was cut so it could be wired into the Gary adapter.
  • J7 (the EXP signal from the expansion connector to Gary to say the expansion RAM is there) is left alone, so the A501 can assert it if it's there.
I have found a better summary of what to put in the Gary adapter, so here it is.

And then how I configured my Gary adapter board:

  • JP1 and JP2 set to 2-3 - ie 1M chip
  • JP3 set to 1-2 - ie 1.5M slow (decoding all of the space, even if I'm not really decoding stuff from the 74HCT139 to more slow RAM)
  • JP4 set to 1-2 (ie, "more slow", so the Gary adapter is properly doing its thing)
And finally, how it looks when it's all done:

(Yes, I was playing with the default colours in the second one, I always disliked the orange.)

If I wanted more RAM then I could easily just piggy back more 41256's on top of the ones I've added and break out the CASL/CASU lines some more, but ... (a) I don't want to, and (b) in that case I'd really just go and build a full 1.5MB slow RAM expansion and undo what I did on the PCB here.

Monday, January 17, 2022

Figuring out how Amiga 500 RAM expansion projects work

 (Wow, what a shift in topics here..)

Yeah I picked up an Amiga 500. Specifically, a rev6 amiga 500. It has 4 extra spots on the mainboard for another 512k of chip ram that isn't populated.

Crap I'm going to have to explain chip RAM.

Ok, so the Amiga is a pretty nifty architecture, especially if you realise it was designed in the early 80s. I won't go into it all because that's not the point of the article and that's covered on the internet.

What I will go into is what I've figured out with the RAM expansions.

So - the RAM types. This is the bits I knew back as a teenager.

The Amiga has three kinds of RAM:

  • Fast RAM is RAM that the CPU can see, but the custom chipsets can't address. It's not slowed down by any contention with the chipset access to its RAM.
  • Chip RAM is RAM that the CPU and the custom chipsets can see. This RAM sits /behind/ the custom chipsets; access to it from the CPU is lower priority than from said chipsets.
  • Slow RAM is RAM that also sits behind the custom chipsets, but for reasons internal to said chipsets they can't actively use. If the custom chipsets are using chip RAM for functions then the CPU will also be blocked.

The reason for chip/slow RAM on the early Amigas only makes sense if you peer into Agnus, the DMA and RAM arbiter chipset. It has a variety of features, but it's basically a big RAM arbiter and DMA engine. The earliest version in the Amiga 1000 supported DMAing to/from 512KB of RAM. However, it supports controlling 1MB of RAM. The next major version update (which I have) supports DMA from and to 1MB of RAM.

Now, because of this early limitation, the Amiga designers put the first 512k that Agnus can control early in the memory map (at $000000), and moved that second 512k of RAM much later in the memory map (address $C00000). That way a future chip that supported more DMA accessible RAM would just extend the chip RAM memory map in a contiguous fashion.

However, this meant a bunch of software was written that assumes the first 512k is at $000000 and the second 512K is at $C00000. Not a lot, but some.

My goal is to have 1MB of chip RAM and at least 512k of slow RAM. That should give the maximum compatibility with all of the Amiga 500 software in the past and set things up pretty well for the future.

Now, this is something people have already done. PeteAU on the Amiga Forums kickstarted a bunch of designs which were debugged and improved upon by forum members. Let's talk about how it works.

First up, Agnus decodes a bunch of address lines to know what the CPU is requesting. However, it only treats things as a memory access if Gary, another custom chip, decoded the address bus and said "yup, this is a RAM access." Gary asserts /RAMEN to Agnus to let Agnus know it's a RAM access and Agnus takes care of doing the memory transfer.

JP2 on the Amiga 500 rev6 board chooses whether Agnus sees the CPU A19 line as A19 or A23. If it's A23, the default, then the second half of Agnus' address bus as viewed by the CPU is at the slow RAM address of $C00000. But if JP2 is cut and the other link is joined, it becomes A19 and both 512KB RAM blocks show up as contiguous RAM at $000000, as chip RAM.

Agnus decodes its A19 line to select which of two 512KB RAM blocks to enable. It does this using the /RAS0 and /RAS1 lines. /RAS0 enables the onboard 512KB RAM. /RAS1 enables the unpopulated 512KB RAM chips on the mainboard. Also, BOTH /RAS0 and /RAS1 appear at the trapdoor RAM expansion underneath the Amiga 500, and the Amiga 501 512KB RAM expansion uses /RAS1 by default.

So, you can easily choose between 1MB of chip RAM and a 512KB chip/512KB slow by changing JP2. That's easy.

JP7 controls whether Gary sees the /EXRAM line from the trapdoor expansion. Gary uses this to control which address ranges are treated as RAM and sent as an enable line to Agnus via /RAMEN.

JP3 controls which 512KB bank is /RAS0 or /RAS1. It lets you swap them, so the trapdoor RAM and onboard RAM sees /RAS0 as /RAS1 and vice versa. You normally shouldn't have to fiddle with this.

Finally, Agnus is responsible for managing the DRAM chips. This requires:

  • Managing the multiplexed column/row address bus setup that DRAM chips use, so it has to latch rows and then columns for reading
  • Asserting the right /RAS and /CAS lines to the right chips (important for normal AND RAM expansion hacks!)
  • Handling DRAM refresh.

Ok, so now that this is done, let's talk about PeteAU's RAM expansion and how they managed to get 1MB of chip RAM and lots of slow RAM.

There are two halves - the expansion RAM board and the "Gary adapter". The easiest to talk about is the expansion RAM board, so that goes first.

The RAM expansion boards still take /RAS0 and /RAS1, and provide jumpers to which ends up at which RAM. Ok, so how does it actually enable different RAM banks?

The two wires that go to the RAM expansion boards are either A19/A20 or some decoded magic that I'll describe later. These feed into a 74LS139 which is a dual 2-to-4 demux. Each demux is responsible - this is important - for demuxing the /CAS lines. So yes, even if all the expansion RAM is using /RAS1, the /CAS lines get enabled only for the RAM that matters. It's important to understand this particular bit of magic. Agnus only has two /CAS lines - one for the lower 8 bits and one for the upper 8 bits of the 16 bit data bus. So all of the RAM gets /CAS enabled, no matter which 512KB bank it is - then the relevant bank to read gets /RAS. Now with PeteAU's design the /CAS lines for the relevant expansion bank gets enabled.

Ok, this is where it gets hairy. So, what about if you have 1MB of chip RAM on board, like I do? PeteAU's Gary board apparently takes care of that too.

One final comment before I move onto the Gary adapter board. Why not go and fiddle with /RAS to enable the right banks? Well, it has to do with DRAM refresh. Agnus also takes care of the refresh cycles which involves asserting only /RAS and enabling each row in the DRAM. If we go and gate which /RAS goes to which chip bank then a bunch of RAM won't get refreshed. You'd then have to add extra logic to see if it's a refresh cycle and manually refresh! Or, you can leave /RAS0 and /RAS1 alone, so DRAM refresh is still OK, and enable RAM using /CAS.

Right! Now onto the Gary board, where the magic happens.

A few things have to happen here for all of this magic to be, well, magic.

  • If you want to support 1MB chip RAM as well as 512K of slow RAM, you need to be able to decode both the chip RAM and slow RAM regions and enable those to Agnus via its A19 line. This is the jumper wire to JP2 on the A500 Rev6 PCB.
  • If you want to support more than 512K of slow RAM, you need to decode both A19 and A20 and fake the /REGEN and /RAMEN signals towards Agnus. (/REGEN is "chipset register space is being accessed.) That way Agnus still thinks a RAM cycle is being initiated, even if it can't "see" the larger RAM address space.
  • Then you need A19/A20 - or a modified version - to the trapdoor RAM expansion. This is the extra 2 bits, or 4 banks of 512KB, to decode all that extra RAM.
  • If Agnus is asserting /BLIT - which says it's doing a DMA cycle, then we need to ensure it's going to U1 on the RAM expansion, or the second 512KB chip RAM bank.

Now, this last point is important for me and other 1MB Amiga chip RAM amiga 500s. How can this RAM expansion even work if there is 1MB of chip RAM on-board? The on-board RAM has all of the /CAS lines from Agnus wired up, without going through the mux.

I think the answer is "not without modifying the board." /RAS0 will continue to enable the first 512K bank. The other 512KB bank and the slow RAM expansion will run off of /RAS1. What I'm likely going to have to do is:

  • Build a 74LS139 adapter board myself for the mainboard;
    • Run the /CAS lines from the expansion connector to it;
    • Run the Gary expansion adapter A19/A20 lines to it;
  • Lift the /CAS lines from the other 512KB RAM I installed, and route it to the 74LS139, like what PeteAU's RAM expansion board does;
  • Modify my A501 (that should be here soon!) to use the /CAS lines I feed it from the 74LS139 board, rather than the expansion connector /CAS lines;
  • Hope it all works!

I'll try to remember to report back with some photos!